1. Field of the Invention
This invention relates generally to the field of semiconductor device manufacturing and, more particularly, to a method and apparatus for comparing device and non-device structures.
2. Description of the Related Art
To fabricate a semiconductor device, a wafer is typically processed in numerous processing tools in a predetermined sequence. The processing tools may include photolithography steppers, etch tools, deposition tools, polishing tools, rapid thermal processing tools, implantation tools, and the like. Each processing tool modifies the wafer according to a particular operating recipe. For example, a photolithography stepper may be used to form a patterned layer of photoresist above the wafer. Features in the patterned layer of photoresist correspond to a plurality of features, e.g. gate electrode structures, which will ultimately be formed above the surface of the wafer. The features formed on the wafer must meet appropriate design and performance criteria. Thus, various types of metrology tools may be used to measure characteristic parameters associated with the features formed on the wafer, such as critical dimensions of the features.
Integrated metrology tools, i.e. metrology tools that are coupled to a processing tool, may be used to measure characteristic parameters associated with the features formed on the wafer by the processing tool. Integrated metrology tools typically have a high throughput, which may enable the integrated metrology tool to measure characteristic parameters associated with substantially all the wafers in a batch. However, the high throughput of such integrated metrology tools often comes at a cost. At least in part to maintain the desired throughput, the integrated metrology tools typically perform these measurements on predetermined, non-device structures formed on the wafer. For example, a scatterometry tool may be capable of measuring a characteristic critical dimension associated with substantially every wafer in a batch, but the critical dimensions are determined using light scattered from non-device structures such as a test grating structure formed on the wafer. Thus, the characteristic parameters determined by such integrated metrology tools may not be a direct measure of the critical dimensions of devices formed on the wafer.
Stand-alone metrology tools, i.e. metrology tools that are physically separate from the processing tools, may also be used to measure characteristic parameters associated with features on a wafer. Compared to integrated metrology tools, stand-alone metrology tools typically perform higher accuracy and/or higher granularity measurements of features, including device structures, formed on the wafer. For example, a critical dimension, scanning electron microscope (CD-SEM) may be able to directly determine critical dimensions of one or more device structures formed on the wafer by analyzing an image of the structures. However, determining the critical dimensions using a CD-SEM in a stand-alone metrology tool is a more complex operation than determining a critical dimension using a scatterometer in an integrated metrology tool. Thus, stand-alone metrology tools generally have a lower throughput than the corresponding integrated metrology tools. Consequently, stand-alone metrology tools may only measure characteristic parameters associated with a subset of the wafers in a batch, which may cause the stand-alone metrology tool to miss some faults in wafers that are not monitored by the stand-alone metrology tool.
The present invention is directed to addressing the effects of one or more of the problems set forth above.